ITC Mobile Conference Guide
Wednesday Technical Sessions, 8:30 a.m.
On this page:
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Session 8: Analog/Mixed-Signal 2
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Session 9: Adaptive Test
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Session 10: Validation
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Session 11: Solving Problems with Nontraditional Tests
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Session 12: Advances in Board-level Structural Test
SESSION 8: Analog/Mixed-Signal 2
Haralampos Stratigopoulos, LIP6 (Chair)
Jacob Abraham, University of Texas at Austin (Firing Line)
Room MKB1
8.1 Streaming Fast Access to ADCs and DACs for Mixed-Signal ATPG
Presenter: Stephen Sunter, Mentor Graphics
8.2 Inductive Coupling of On-Chip Signals: A Case Study and Preventative Methodology (invited)
Presenter: Steven Loveless, Texas Instruments
8.3 Performance, Robustness and Reliability of Digitally Calibrated Data Converters (invited)
Presenter: Yun Chiu, University of Texas at Dallast
SESSION 9: Adaptive Test
Michael Laisne, Qualcomm (Chair)
Peter Maxwell, ON Semiconductor (Firing Line)
Room MKB2
9.1 Generalization Of An Outlier Model Into A ``Global'' Perspective
Presenter: Sebastian Siatkowski, University of California at Santa Barbara
9.2 Enabling Adaptive Test Feed Forward by using NVM
Presenter: Jeffrey Roehr, Texas Instruments
SESSION 10: Validation
Enamul Amyeen, Intel (Chair)
Shawn Blanton, Carnegie Mellon University (Firing Line)
Room MKB3
10.1 Importance of Post-Silicon Validation Beyond Parametric Testing (invited)
Presenter: Erika Beskar, Texas Instruments
10.2 A Structured Approach to Post-Silicon Validation and Debug using Symbolic Quick Error Detection
Presenter: David Lin, Stanford University
10.3 Technique for Pre-Silicon Peak Current Estimation and Post-Silicon Validation for Improved Device Quality
Presenter: Bonita Bhaskaran, NVIDIA Corporation
SESSION 11: Solving Problems with Nontraditional Tests
Rubin Parekhji, Texas Instruments (Chair)
Yanjing Li, Stanford University (Firing Line)
Room MKB4
11.1 A Deterministic BIST Scheme Based on EDT-Compressed Test Patterns
Presenter: Jedrzej Solecki, Poznan University of Technology
11.2 Platform IO and System Memory Test Using L3 Cache Based Test (CBT) and Parallel Execution of CPGC Intel BIST Engine
Presenter: Bruce Querbach, Intel
11.3 RetroDMR: Troubleshooting Non-Deterministic Faults with Retrospective DMR (invited)
Presenter: Qiang Xu, The Chinese University of Hong Kong
SESSION 12: Advances in Board-level Structural Test
Zoe Conroy, Cisco Systems Chair)
David Armstrong, Advantest (Firing Line)
Room DGB South A & B
12.1 Electrical Package Defect Testing for Volume Production
Presenter: Ming Xue, Infineon Technologies
12.2 Tolerance Analysis of Fixture Fabrication, from Drilling Holes to Pointing Accuracy
Presenter: Jim Long, Landrex Technology
12.3 Challenges and Opportunities for In-Circuit Test
Presenter: Doug Olson, Keysight Technologies