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Wednesday Technical Sessions, 2 p.m.

 

SESSION 14:  Room 602-4

Advances in Packaging and Probing

Swaroop  Ghosh, University of South Florida (Chair)

 

14.1 (Invited) Managing Signal,  Power and Thermal Integrity for 3-D Integration

Presenter:  Madhavan Swaminathan, Georgia Institute of Technology

Firing Line: Krishnendu Chakrabarty, Duke University (FL)

 

14.2  Direct Probing on Large-Array Fine- Pitch Micro-Bumps of a Wide-I/O  Logic-Memory Interface

Presenter: Erik Jan Marinissen, IMEC

Firing Line: Doug Josephson, Intel

 

14.3  Wafer-level Chip-scale Package  Copper Pillar Probing

Presenter:  Hao Chen,   Taiwan Semiconductor Manufacturing Company

Firing Line: Vivek Chickermane, Cadence Design Systems

 

RATE SESSION 14

 

 

 

SESSION 15:   Room 608-9

Building Robust Systems: Under Test and in the Wild

Haluk Konuk, Broadcom (Chair)

 

15.1  (Invited) A Tale of Two Lives: Under Test and in the Wild

Presenter:  Bianca Schroeder, University of Toronto

Firing Line: Chen-Yong Cher, IBM

 

15.2  Soft Error Resiliency   Characterization and Improvement on IBM BlueGene/Q Processor Using Accelerated Proton Irradiation

Presenter: Chen-Yong Cher, IBM 

Firing Line:  Zebo Peng, Linkoping University

 

15.3  Efficient RAS Support for  Die-stacked DRAM

Presenter: Hyeran Jeon, Texas Instruments

Firing Line: Vikas Chandra, ARM

 

RATE SESSION 15

 

 

SESSION 16:  Room 615

Emerging SoC Challenges: Design, Quality, Reliability

Nur Touba, University of Texas at Austin (Chair)

 

16.1 Systematic Approach for Trim Test-Time Optimization: Case Study  on a Multicore RF SOC

Presenter: Rajesh Mittal,  Texas Instruments

Firing Line: Salvado Mir, TIMA Laboratory

 

16.2  (Invited) Thermal-aware Mobile SoC Design and Test in 14-nm FinFET Technology

Presenter: Bong Hyun Lee, Samsung

Firing Line: Devanathan Varadarajan, Texas Instruments 

 

16.3  Robustness of TAP-based Scan Networks

Presenter:  Farrokh Ghani Zadegan,   Ericsson

Firing Line: Nicola Nicolici, McMaster University

 

 

RATE SESSION 16

 

 

SESSION 17:   Room 618

Coding, Coverage, Vmin and Repair: Tradeoffs in Today’s Embedded Memories

Said Hamdioui,  Delft Univ. of Technology (Chair)

 

17.1  (Invited) Trading-Off On-Die Observability for Cache Minimum Supply Voltage Reduction in System-on-Chip (SoC) Processors

Presenter: Keith Bowman, Qualcomm

Firing Line: Hans-Joachim Wunderlich, University of Stuttgart 

 

17.2 (Invited) Design, Test and Repair Methodology for FinFET-based Memories

Presenter: Yervant Zorian, Synopsys

Firing Line:  Jonathan Chang, TSMC

 

17.3  A Tag-based Solution for Efficient Utilization of Efuse for Memory Repair

Presenter:  Kalpesh Shah, Texas Instruments

Firing Line: Samy Makar

 

 

RATE SESSION 17

 

 

SESSION 18 :   Room  606

Big Data: Big Problem or Opportunity for Test?

Peter Maxwell, ON Semiconductor (Chair)

 

18.1  Spatiotemporal Wafer-level Correlation Modeling with Progressive Sampling: A Pathway to HVM Yield Estimation

Presenter:   Ali Ahmadi,  UT Dallas

Firing Line:  Anne Gattiker, IBM

 

18.2  Yield Optimization Using Advanced Statistical Correlation Methods

Presenter: Li-C. Wang, University of California, Santa Barbara

Firing Line:  Shawn Blanton, Carnegie Mellon University

 

18.3   (Invited) Big Data and Test

Presenter: Anne Gattiker, IBM

Firing Line: Jim Huang, Hewlett Packard

 

 

RATE SESSION 18

 

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