ITC Conference Guide
Analog Design-for-Test: What's the Real Story?
Robert Aitken, ARM (Moderator); Mani Soma, University of Washington (Organizer)
Analog design-for-test (DFT) and mixed-signal DFT have made rapid progress in the last 10 years, with many new ideas presented at worldwide conferences and published in journals. Yet an examination of recent advances in design shows a rather surprising missing link: analog designers rarely, if at all, use any of the published DFT methods in their designs; they choose their own methods instead, and incorporate them during design time. Recent hot topics, e.g., design-for-self-healing, design-for-calibration, adaptive designs, etc., make this missing link even more puzzling. The question remains why analog designers are not utilizing the methods published by analog DFT researchers, and why analog DFT researchers have not re-used or enhanced methods already demonstrated by analog designers.
Following are the panelists and their biographies:
Terri Fiez (Oregon State University): Terri Fiez is a Professor of EECS at Oregon State university after serving as Head. She has been active in the IEEE Solid-State Circuits Society and IEEE Circuits and Systems Society serving in various prominent roles for the IEEE Trans. on Circuits and Systems, Solid-State Circuits Society, IEEE Journal of Solid-State Circuits, and the IEEE International Solid-State Circuits Conference. She received the 2006 IEEE Educational Activities Board Innovative Education Award and the NSF Young Investigator Award, and she is an IEEE Fellow. Her research focuses on analog and mixed-signal integrated circuits and innovative education.
Sandeep Kumar (Silicon Labs):
Sandeep Kumar is Senior Vice President of Worldwide Operations at Silicon Labs. Dr.Kumar joined Silicon Labs in 2006 and is responsible for U.S.-based product and test engineering, quality, failure analysis, and foundry/device and assembly engineering, as well as the prototype production test labs. Dr. Kumar has a B.T. in Electrical Engineering from the Indian Institute of Technology, a M.S. in Electrical Engineering from the University of Evansville in Indiana and a Ph.D. in Electrical Engineering from Lehigh University
Jeyanandh Paramesh (Carnegie Mellon University): Jeyanandh Paramesh (Carnegie Mellon University): Since 2007, Jeyanandh has been with the Department of Electrical and Computer Engineering at Carnegie Mellon University, where he is currently an Associate Professor. His doctoral research was performed in collaboration with the Communications Circuits Lab, Intel, during which he demonstrated the first integrated CMOS beamforming receiver. He has also designed high-efficiency power amplifiers and high-speed data converters for high data-rate wireless transceivers. His current research interests include IC design for emerging applications in nanoscale CMOS and other emerging technologies.
Stephen Sunter (Mentor Graphics):
Stephen has been involved with mixed-signal IC design, test, and DFT for over 35 years. He has written four book chapters, 26 U.S. patents, and over 40 papers in this area, and he is an active member of every IEEE Working Group developing analog DFT-related standards (1149.4, 1149.6, 1149.8, P1149.10). He has been the Engineering Director for Mixed-Signal DFT at LogicVision and now Mentor Graphics for over 15 years.