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Tuesday Technical Sessions, 2:00

 

On this page:

  • Session 1: Diagnosis

  • Session 2: DFT

  • Poster Preview Talks

  • Special Session 1: Test of Low/High-Power Devices

  • IEEE/TTTC E.J. McCluskey Best Doctoral Thesis Award: Final Round

 

SESSION 1:  Design and Data Optimization for Diagnosis 

P. Song, IBM (Chair) 

A. Gattiker, IBM (Discussant)

Room 201A

 

1.1  Diagnostic Resolution Improvement with Active Learning-guided Physical Failure Analysis

Presenter: Y Xue, Carnegie Mellon University

 

1.2   A Novel Diagnostic Test Generation  Methodology and Its Application in Production Failure Isolation

Presenter: E. Amyeen, Intel

 

1.3  Handling Wrong Mapping: A New  Direction Towards Better Diagnosis with Low Pin Convolution Compressors

Presenter: S. Kundu, Synopsys

1.4  Using Symbolic Canceling to Improve  Diagnosis from Compacted Response

Presenter: K. Saleem, University of Texas at Austin

 

RATE SESSION 1

 

 

 

 

SESSION 2: DFT

P. Wohl, Synopsys  (Chair) 

V. Chickermane, Cadence (Discussant)

Room 201BC

 

2.1  Test Point Insertion in Hybrid Test Compression/LBIST Architectures

Presenter: J. Rajski, Mentor Graphics

2.2  A Unified Test and Fault-tolerant Multicast Solution for Network-on-Chip Designs

Presenter: D. Xiang, Tsinghua University

 

2.3   Putting Wasted Clock Cycles to Use:Enhancing Fortuitous Cell-aware Fault Detection with Scan Shift Capture

Presenter: F. Zhang, Southern Methodist University

2.4  Minimal-Area Test Points for Deterministic Patterns

Presenter:  Y. Liu, University of Iowa

RATE SESSION 2

 

 

SPECIAL SESSION 1:  Test of Low/High-Power Devices

V. Devanathan, Texas Instruments (Chair)

H. Kobayashi, Gunma University  (Discussant)

Room 202A

 

S1.1*  DFT Test Considerations for Low- Power Devices
Presenter: T. McLaurin, ARM

 

S1.2* Scan-based Low Power Test Generation
Presenter: X. Lin, Mentor Graphics

 

S1.3*  Got the Power? Test and DFT of Mobile Power Management ICs (PMICs)
Presenter: H. von Staudt, Dialog Semiconductor

 

S1.4* Transient Testing of Integrated Power Output Stages
Presenter:  W-T. Ng, University of Toronto

* Invited Talk


RATE SPECIAL SESSION 1

 

IEEE TTTC E. J. McCluskey Best Doctoral Thesis Award: Final Round

K. Huang, University of Texas at Dallas (Chair)

Room 202B

TC1  Memory Repair for High Fault Rates
Presenter:  P. Papavramidou, TIMA, Grenoble

 

TC2  Output Bit Selection Methodology for   Test Response Compaction
Presenter: W-C. Lien, National Cheng    Kung University

 

TC3  Testing of Interposer-based 2.5D Integrated  Circuits
Presenter: R. Wang, Duke University

 

 

 

RATE Doctoral Dissertation Competition

 

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