10:30 Session | 2016itc

Wednesday Technical Sessions, 10:30 a.m.

On this page:

Session 6: IEEE 1687
Session 7: Analog II
Session 8: Analytics I
Session 9: Emerging Devices
Special Session 6: Heterogeneous Integration Pushes the Test Roadmap

SESSION 6: IEEE 1687

X. Gu (Chair)

B. Eklow (Discussant)

Room 201A

6.1 A Suite of IEEE 1687 Benchmark Networks
Presenter: A. Tsertov, Testonica Lab

6.2 Accessing 1687 Systems Using Arbitrary Protocols
Presenter: M. Portolan, TIMA

6.3 Upper-Bound Computation for Optimal Retargeting in IEEE 1687 Networks
Presenter: F. Zadegan, Lund University

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SESSION 7: Analog II

M. Slamani, GLOBALFOUNDRIES (Chair)

P. Sarson, ams (Discussant)

Room 202CD

7.1 Low Cost Ultra-Pure Sine Wave Generation with Self Calibration
Presenter: Y. Zhuang, Iowa State University

7.2 RF Test Accuracy and Capacity Enhancement on ATE for Silicon TV Tuners
Presenter: A. Verma, Silicon Labs

7.3 Enabling External Loopback At-Speed HVM Test Using Production Parametric Load-Board

Presenter: S. Arora, Intel

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SESSION 8: Analytics II
Y. Makris, University of Texas at Dallas (Chair)

A. Gattiker, IBM (Discussant)

Room 202A

8.1 What We Know After Twelve Years Developing and Deploying Test Data Analytics
Presenter: K. Butler, Texas Instruments;

8.2 Supply-Voltage Optimization to Account for Process Variations in High-Volume Manufacturing Testing
Presenter: K. Chakrabarty, Duke University

8.3 Variation and Failure Characterization Through Pattern Classification of Test Data From Multiple Test Stages
Presenter: C-K. Hsu, University of California, Santa Barbara

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Session 9: Emerging Devices

S. Adham, TSMC (Chair)

C. Chakravadhanula, Cadance design Systems (Discussant)

Room 201BC

9.1 Built-in Self-Test for Microelectrode-Dot-Array Digital Microfluidic Biochips
Presenter: Z. Li, Duke University

9.2 Online Slack-Time Binning for IO-Registered Die-to-Die Interconnects
Presenter: S-Y Huang, National Tsing Hua University

9.3* Anticipated Test Challenges of Emerging Devices
Presenter: R. Aitken, ARM

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SPECIAL SESSION 6: Heterolgenous Integration Pushes the Test Roadmap

T. M. Mak (Chair and Discussant)

Room 202B

S 6.1* Moore's Law is Done and Heterogeneous Integration is Taking Off
Presenter: D. Armstrong, Advantest

S 6.2* Probe Challenges Are Changing Rapidly
Presenter: M. Loranger, FormFactor

S 6.3* Test and Supply Chain Challenges for Heterogeneous Integration
Presenter: B. Eklow

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* Invited Talk